A good fraction of my theoretical research is on the design of semiconductor devices (primarily heterostructure solar cells, HBTs, HEMTs, and FETs). It was, however, critical for me to be familiar with the device manufacturing steps as well to be able to account for them in my designs. Moreover, manufacturing limitations and practical deviations from the theoretical models significantly influence the design choices. All this motivated me to take a course on VLSI manufacturing with complementary clean-room labs. In these labs, we manufactured our own transistor arrays starting from a Si waver to a completed array in a span of a semester.
